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Research Article 


LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS

MAHANKALI VARALAXMI, M.SUNDER RAO.

Abstract
Comparators are a basic design module and element in modern digital VLSI design, digital signal processors and data processing application-specific integrated circuits. This paper comprises of design of three different comparators for 2, 4 and 8 bit magnitude comparison. The above said designs are prepared using two different design approaches: Weighted Logic and PTL .The above two design approaches are designed in a way to endow with good quality performance. The performance of these three different comparators in the two design styles has been compared in terms of area and power consumption which are the important parameters that are considered while designing any digital circuit. The schematic are designed and simulated for its behavior using DSCH-3.1.The layout of simulated circuits are created using Verilog based net list file which is then simulated in Microwind 3.1 to analyze the performance of comparators for the two design styles at 45nm and 32 nm CMOS technology.

Key words: PTL, comparator, IC, Adder, A/D converter.


 
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Pubmed Style

MAHANKALI VARALAXMI, M.SUNDER RAO. LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. EEO. 2021; 20(5): 4155-4160. doi:10.17051/ilkonline.2021.05.456


Web Style

MAHANKALI VARALAXMI, M.SUNDER RAO. LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. http://ilkogretim-online.org//?mno=68952 [Access: April 09, 2021]. doi:10.17051/ilkonline.2021.05.456


AMA (American Medical Association) Style

MAHANKALI VARALAXMI, M.SUNDER RAO. LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. EEO. 2021; 20(5): 4155-4160. doi:10.17051/ilkonline.2021.05.456



Vancouver/ICMJE Style

MAHANKALI VARALAXMI, M.SUNDER RAO. LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. EEO. (2021), [cited April 09, 2021]; 20(5): 4155-4160. doi:10.17051/ilkonline.2021.05.456



Harvard Style

MAHANKALI VARALAXMI, M.SUNDER RAO (2021) LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. EEO, 20 (5), 4155-4160. doi:10.17051/ilkonline.2021.05.456



Turabian Style

MAHANKALI VARALAXMI, M.SUNDER RAO. 2021. LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. Elementary Education Online, 20 (5), 4155-4160. doi:10.17051/ilkonline.2021.05.456



Chicago Style

MAHANKALI VARALAXMI, M.SUNDER RAO. "LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS." Elementary Education Online 20 (2021), 4155-4160. doi:10.17051/ilkonline.2021.05.456



MLA (The Modern Language Association) Style

MAHANKALI VARALAXMI, M.SUNDER RAO. "LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS." Elementary Education Online 20.5 (2021), 4155-4160. Print. doi:10.17051/ilkonline.2021.05.456



APA (American Psychological Association) Style

MAHANKALI VARALAXMI, M.SUNDER RAO (2021) LOW POWER DIGITAL COMPARATOR MODELLING AND IMPLEMENTING FOR DSP APPLICATIONS. Elementary Education Online, 20 (5), 4155-4160. doi:10.17051/ilkonline.2021.05.456








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